How to use 8-bit parallel display on STM32F4 for Arcade?

May I ask how to setup the config pins for the 8-bit parallel (D0 to D7 of LCD) connection of the ILI9341 LCD display to an STM32F4 device as suggested on the Arcade documentation?

320x240 based on ILI9341 via 8-bit parallel

On F4, this requires an 8 bit parallel interface because SPI at 42Mhz is unstable; int this case STM32F412RE or better is required.

I only found these lines from the default config.h on the patcher.
#define CFG_PIN_LCD_DATALINE4 0x3f3
#define CFG_PIN_LCD_DATALINE5 0x3f4
#define CFG_PIN_LCD_DATALINE6 0x3f5
#define CFG_PIN_LCD_DATALINE7 0x3f6

Has there been any successful attempt of using 8-bit parallel connection for an ILI9341 with an STM32F4 board with arcade bootloader?

The document suggests using parallel connection for faster FPS on the display but I have not seen any bootloader config that worked, only with SPI using Feather F405 or F411 Black Pill.

Also, there was no definition for the RD and WR pins of the LCD on the configkeys.h to assign these LCD pins to the mcu (i.e. STM32F4) pins.

@mmoskal

Also, is it right to assume that the 8-bit parallel pins are setup using the PIN_D0 to D7 on the config?
I do not see any DISPLAY_DATA0… to DISPLAY_DATA7 mentioned too.

As an example:

PIN_D0 = PB01
PIN_D1 = PA02
PIN_D2 = PA03
PIN_D3 = PB15
PIN_D4 = PB14
PIN_D5 = PB13
PIN_D6 = PB10
PIN_D7 = PB03

My understanding is that the definitions for PIN_D1…to PIN_D7 above is used to define the pins as Digital I/O to the mcu pins on the config, which can also be used by the LCD 8-bit parallel interface of course.

You need F412 to run the parallel display.

The data pins are not defined in the bootloader, they are fixed as described in documentation. You do have a choice for the WR pin, and you set in bootloader using DISPLAY_MOSI key. DISPLAY_MISO should be either set to PC5 when it’s connected to RD, or undefined otherwise. Note that if your display has a level-shifter you may want to connect the RD to get the shifters in the right state.

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